DocumentCode
2380297
Title
An efficient heterogeneous reconfigurable functional unit for an adaptive dynamic extensible processor
Author
Arash Mehdizadeh, ; Behnam Ghavami, ; Morteza Saheb Zamani, ; Hossein Pedram, ; Farhad Mehdipour,
Author_Institution
Computer Engineering Department, Amirkabir University of Technology (Tehran Polytechnic), 424 Hafez Ave, 15785, Iran
fYear
2007
fDate
15-17 Oct. 2007
Firstpage
151
Lastpage
156
Abstract
Replacing functional units of an extensible processor with reconfigurable fnctional units enhances performance and flexibility ofprocessors to execute custom instructions. That is due to the ability ofreconfigurable fnctional units to perform computations in hardware to increase performance, while retaining much of the flexibility of a software solution. In this paper, we develop a heterogeneous architecture for the reconfigurable fnctional unit of an extensible processor. To verify the efficiency of our architecture, we applied it to 8 applications of Mibench. Our experiments show that compared to the similar architectures, ours supports a wide range of custom instructions. In addition, use of the new architecture improves execution time of custom instructions by 20% to 30% on average. Moreover, compared with the previous architecture, area is reduced by 15%.
Keywords
Very large scale integration; Custom Instruction; Extensible Processor; Reconfigurable Functional Unit;
fLanguage
English
Publisher
ieee
Conference_Titel
Very Large Scale Integration, 2007. VLSI - SoC 2007. IFIP International Conference on
Conference_Location
Atlanta, GA, USA
Print_ISBN
978-1-4244-1709-4
Type
conf
DOI
10.1109/VLSISOC.2007.4402489
Filename
4402489
Link To Document