Simulation of hybrid computer architectures: simulators, methodologies and recommendations

In the future, high performance computing systems may consist of multiple multicore processors and reconfigurable logic coprocessors. Industry trends indicate that such coprocessors will be socket compatible to microprocessors and will be integrated on existing multiprocessor motherboards without any glue logic. Due to these trends, it is likely that such hybrid computing machines will be a breakthrough for various High Performance Computing (HPC) applications. It is essential to investigate the computer architecture of such hybrid computing machines that utilize reconfigurable logic coprocessors as application accelerators in a HPC system. Simulation can be used to aid this architectural research and guide design space exploration. In this paper, we first present a representative architecture for future hybrid computing machines. Next we present a survey of existing simulators and simulation methodologies for simulation of components of hybrid computing systems. FInally, we present some of the challenges and recommendations to encourage research in hybrid computing machines and their simulators.