• DocumentCode
    2380519
  • Title

    Power optimization for conditional task graphs in DVS enabled multiprocessor systems

  • Author

    Malani, Parth ; Mukre, Prakash ; Qiu, Qinru

  • Author_Institution
    Department of Electrical and Computer Engineering, Binghamton University, NY 13902, USA
  • fYear
    2007
  • fDate
    15-17 Oct. 2007
  • Firstpage
    230
  • Lastpage
    235
  • Abstract
    In this paper, we focus on power optimization of real-time applications with conditional execution running on a dynamic voltage scaling (DVS) enabled multiprocessor system. The targeted system consists of heterogeneous processing elements with non-negligible inter-processor communication delay and energy. Given a conditional task graph (CTG), we have developed novel online and offline algorithms that perform simultaneous task mapping and ordering followed by task stretching. Both algorithms minimize the mathematical expectation of energy dissipation of non-deterministic applications by considering the probabilistic distribution of branch selection. Compared with existing CTG scheduling algorithms, our online and offline scheduling algorithms reduce energy by 28% and 39% in average, respectively.
  • Keywords
    Application software; Delay; Dynamic voltage scaling; Energy dissipation; Heuristic algorithms; Multiprocessing systems; Real time systems; Scheduling algorithm; Simultaneous localization and mapping; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Very Large Scale Integration, 2007. VLSI - SoC 2007. IFIP International Conference on
  • Conference_Location
    Atlanta, GA, USA
  • Print_ISBN
    978-1-4244-1710-0
  • Electronic_ISBN
    978-1-4244-1710-0
  • Type

    conf

  • DOI
    10.1109/VLSISOC.2007.4402503
  • Filename
    4402503