High speed SOC design for blowfish cryptographic algorithm

This paper seeks to implement the Blowfish algorithm in VHDL and provide a simple, robust implementation of Blowfish in hardware. As of today, the Blowfish algorithm has no known cryptanalysis. A hardware implementation of Blowfish would be a powerful tool for any mobile device or any technology requiring strong encryption. Our final design uses the core-slow library for worst-case scenario analysis and reaches an incredible encryption speed of 590 MBits/sec and a decryption speed of 559 MBits/sec. The area is 4996 standard cell,s and the power is a mere 63 mW. These results are very competitive and beat out the competition as far as speed. The overall design is an incredibly fast, efficient Blowfish implementation suitable for a plethora of applications. The speed can be drastically increased further at the expense of space and power by pipelining.