A 2.5 V 57 MHz 15-tap SC bandpass interpolating filter with 320 MHz output sampling rate in 0.35 /spl mu/m CMOS

Author

Seng-Pan U ; Martins, R.P. ; Franca, J.E.

Author_Institution

Univ. of Macau, China

Volume

1

fYear

2002

fDate

7-7 Feb. 2002

Firstpage

380

Abstract

A 57 MHz SC bandpass interpolating filter with 320 Msample/s output is realized in 0.35 /spl mu/m CMOS for DDFS (direct-digital frequency synthesis) systems. 15-tap FIR response is achieved with sampling rate increase and frequency upconversion by translating 22 MHz 80 Msample/s input to 56 MHz 320 Msample/s output. Dynamic range is 69 dB (1%THD) and 61 dB (1%IM3). The filter dissipates 120 mW analog and 16 mW digital at 2.5 V supply.

Keywords

CMOS integrated circuits; FIR filters; direct digital synthesis; frequency convertors; harmonic distortion; integrated circuit design; integrated circuit measurement; intermodulation distortion; interpolation; sampled data filters; switched capacitor filters; 0.35 micron; 120 mW; 16 mW; 2.5 V; 22 MHz; 320 MHz; 56 MHz; 57 MHz; CMOS technology; DDFS system; FIR response; IM3; SC bandpass interpolating filter; THD; direct-digital frequency synthesis system; dynamic range; frequency upconversion; output sampling rate; power dissipation; sampling rate; Band pass filters; CMOS technology; Capacitance; Capacitors; Circuit noise; Control systems; Delay lines; Finite impulse response filter; IIR filters; Sampling methods;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International

Conference_Location

San Francisco, CA, USA

Print_ISBN

0-7803-7335-9

Type

conf

DOI

10.1109/ISSCC.2002.993091

Filename

993091