Advanced DES Algorithm against Differential Power Analysis and its Hardware Implementation

Author

Huiping, Jiang ; Rui, Xu ; Sheng, Bao

Author_Institution

Tsinghua Univ., Beijing

fYear

2007

fDate

1-3 Nov. 2007

Firstpage

316

Lastpage

320

Abstract

In this article, the advanced DES algorithm against differential power analysis (DPA) is provided, based on the original model of DPA. The DES_DPA module is build according to the above principle, which the linear part of the module adopted the MASK technology for the specialty of the DES algorithm and the localizations of the storage. And its efficiency was explained from the view of DPA´s principle. With 0.25 mum CMOS technology library, the result showed that the gate count of DES_DPA module is about 1914, the maximize delay is 9.57 ns, and can be worked correctly under 100 MHz, so that it is well suited to the field of smart card and the information security.

Keywords

cryptography; data privacy; smart cards; CMOS library; DES algorithm; MASK technology; differential power analysis; gate count; information security; secret key cryptography; smart card; storage localization; Algorithm design and analysis; CMOS technology; Cryptography; Delay estimation; Energy consumption; Hardware; Information security; Power measurement; Signal analysis; Smart cards;

fLanguage

English

Publisher

ieee

Conference_Titel

Data, Privacy, and E-Commerce, 2007. ISDPE 2007. The First International Symposium on

Conference_Location

Chengdu

Print_ISBN

978-0-7695-3016-1

Type

conf

DOI

10.1109/ISDPE.2007.72

Filename

4402701