DocumentCode
2383177
Title
A controlled probability random pulse generator suitable for VLSI implementation
Author
Al-Khalili, A.J. ; Al-Khalili, D.
Author_Institution
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que.
fYear
1989
fDate
25-27 Apr 1989
Firstpage
247
Lastpage
255
Abstract
A method for generating a controlled number of pulses randomly within a specified time is presented. The number of random pulses is presettable by an external device. The theory of maximal-length pseudorandom binary sequences is used as the basis of the method. An example of such a random generator is given, and it is implemented in a single VLSI chip using 3-μm double-layer CMOS technology. This method of producing a controlled probability random generator has been proved to be simple and can be implemented in a single chip of not more than 500 gates
Keywords
CMOS integrated circuits; VLSI; integrated logic circuits; probability; pulse generators; random processes; 3 micron; CMOS; VLSI; controlled probability random pulse generator; maximal-length pseudorandom binary sequences; Binary sequences; CMOS technology; Delay; Equations; Linear feedback shift registers; Output feedback; Pulse generation; Random number generation; Random sequences; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Instrumentation and Measurement Technology Conference, 1989. IMTC-89. Conference Record., 6th IEEE
Conference_Location
Washington, DC
Type
conf
DOI
10.1109/IMTC.1989.36863
Filename
36863
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