DocumentCode
238332
Title
Implementation of an efficient 64-bit Carry Select Adder using muxes
Author
Rahul Chandran, G. ; Saraswathi, N.
Author_Institution
Electron. & Commun. Eng., SRM Univ., Chennai, India
fYear
2014
fDate
8-10 May 2014
Firstpage
430
Lastpage
434
Abstract
Carry Select Adder (CSLA) is one of the most commonly used adder circuits in many arithmetic operations. Most of the multipliers and adders make use of CSLA´s. Regular Square root Carry Select Adder(SQRT CSLA) uses two Ripple Carry Adders (RCA), one with carry input as `0´ and the other with carry input as `1´. To reduce the size of regular SQRT CSLA, a Binary to Excess One converter (BEC) is used instead of RCA with carry input `1´. In this paper an implementation of an efficient 8,16,32 and 64 -bit square root Carry Select Adder(CSLA) using modified full adder, is carried out to achieve more power savings comparable to the existing systems.
Keywords
adders; multiplying circuits; BEC; adder circuits; binary to excess one converter; carry select adder; modified full adder; muxes; power savings; regular SQRT CSLA; ripple carry adders; Field programmable gate arrays; Layout; Logic gates;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Communication Control and Computing Technologies (ICACCCT), 2014 International Conference on
Conference_Location
Ramanathapuram
Print_ISBN
978-1-4799-3913-8
Type
conf
DOI
10.1109/ICACCCT.2014.7019479
Filename
7019479
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