Title :
Optimization issues for fully-integrated CMOS DC-DC converters
Author :
Musunuri, S. ; Chapman, P.L.
Author_Institution :
Illinois Univ., Urbana, IL, USA
Abstract :
A general approach is given for minimizing the chip area occupied by fully integrated CMOS continuous mode buck and boost converters. It is shown that most significant portion of the area is occupied by the planar inductors. It is also shown that in most cases, continuous conduction mode requires that the minimum (critical) inductance must be used to minimize area. A design example accompanies the analysis, along with experimental results from a test integrated circuit.
Keywords :
CMOS integrated circuits; DC-DC power convertors; circuit optimisation; power inductors; power integrated circuits; chip area minimisation; continuous conduction mode; continuous mode boost converters; continuous mode buck converters; critical inductance; fully-integrated CMOS DC-DC power converters; minimum inductance; optimization issues; planar inductors; Buck converters; DC-DC power converters; Energy management; Fabrication; Inductors; Minimization; Switched capacitor circuits; Switches; Switching frequency; Voltage;
Conference_Titel :
Industry Applications Conference, 2002. 37th IAS Annual Meeting. Conference Record of the
Conference_Location :
Pittsburgh, PA, USA
Print_ISBN :
0-7803-7420-7
DOI :
10.1109/IAS.2002.1042782
