Analysis and high performance parallel architecture design for EBCOT in JPEG2000

Author

Zhang, Yi-Zhen ; Xu, Chao

Author_Institution

Nat. Lab. on Machine Perception, Peking Univ., Beijing, China

Volume

3

fYear

2005

fDate

11-14 Sept. 2005

Abstract

This paper presents analysis and design of bitplane parallel architecture for embedded block coding with optimization truncation (EBCOT) tier-1 in JPEG2000. By detailed analysis of bitplane parallel context modeling, we discover the reason that causes the degradation of the parallel entropy coding performance. Two improved methods, referred to as data-pairs ordering (DPO) and flexible MQ (FMQ) coder are proposed. The coding speed can be improved greatly by using the improved bitplane parallel coding methods. Compared with the conventional bitplane parallel architecture, our architecture can decrease about 24% of the computation time.

Keywords

block codes; data compression; entropy codes; image coding; parallel architectures; EBCOT; JPEG2000; bitplane parallel architecture; data-pairs ordering; embedded block coding; high performance parallel architecture design; optimization truncation; parallel entropy coding; Arithmetic; Computer architecture; Context modeling; Degradation; Discrete wavelet transforms; Entropy coding; Image coding; Parallel architectures; Performance analysis; Transform coding;

fLanguage

English

Publisher

ieee

Conference_Titel

Image Processing, 2005. ICIP 2005. IEEE International Conference on

Print_ISBN

0-7803-9134-9

Type

conf

DOI

10.1109/ICIP.2005.1530562

Filename

1530562