Interpolation based direct digital frequency synthesis for wireless communications

Author

Eltawil, Ahmed M. ; Daneshrad, Babak

Author_Institution

Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA

Volume

1

fYear

2002

fDate

17-21 Mar 2002

Firstpage

73

Abstract

In this paper, a compact architecture for direct digital frequency synthesis (DDFS) is presented. It uses a smaller lookup table for sine and cosine functions compared to existing architectures, with minimal hardware overhead. The computation of the sinusoidal values is performed by a parabolic interpolation structure, thus only interpolation coefficients need to be stored in the read-only memory (ROM). A DDFS with 64 dBc SFDR, 10-bit output resolution and 32 bit phase accumulator requires only 104 bits of ROM storage. The ROM size is consistently less than 1 Kbits for SFDR up to 85 dBc.

Keywords

direct digital synthesis; interpolation; mobile radio; read-only storage; table lookup; DDFS; ROM storage; cosine functions; direct digital frequency synthesis; lookup table; parabolic interpolation structure; phase accumulator; read-only memory; sine functions; Clocks; Communication system control; Computer architecture; Frequency synthesizers; Hardware; Interpolation; Read only memory; Table lookup; Tuning; Wireless communication;

fLanguage

English

Publisher

ieee

Conference_Titel

Wireless Communications and Networking Conference, 2002. WCNC2002. 2002 IEEE

Print_ISBN

0-7803-7376-6

Type

conf

DOI

10.1109/WCNC.2002.993466

Filename

993466