A SAR A/D converter using PWM technique

Author

Colletta, Gustavo Della ; Ferreira, Luis H C ; Pimenta, Tales Cleber ; Crepaldi, Paulo C.

Author_Institution

Dept. of Microelectron., Univ. Fed. de Itajuba, Itajuba, Brazil

fYear

2012

fDate

13-16 May 2012

Firstpage

407

Lastpage

410

Abstract

This paper presents the modeling calculations of a new SAR A/D converter architecture that uses a PWM generator and a first order low pass filter to build a simple circuit. In order to validate calculations, a 4 - bit successive approximation A/D converter has been simulated using Simulink and Modelsim. Then the circuit layout was developed in 0.5μm CMOS process with CADENCE Virtuoso. Post layout simulations were performed using BSIM3v3 model in Spectre simulator. The power consumption is only 16μW for a 2.5V power supply. DNL and INL erros are less then 0.1LSB.

Keywords

CMOS logic circuits; analogue-digital conversion; approximation theory; low-pass filters; BSIM3v3 model; CADENCE Virtuoso; CMOS process; DNL erros; INL erros; Modelsim; PWM generator; SAR A/D converter architecture; Simulink; first order low pass filter; power 16 muW; power consumption; size 0.5 mum; spectre simulator; successive approximation A/D converter; successive approximation register; supply; voltage 2.5 V; word length 4 bit; Equations; Generators; Mathematical model; Power demand; Pulse width modulation; Semiconductor device modeling; Time frequency analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics (MIEL), 2012 28th International Conference on

Conference_Location

Nis

ISSN

pending

Print_ISBN

978-1-4673-0237-1

Type

conf

DOI

10.1109/MIEL.2012.6222888

Filename

6222888