• DocumentCode
    2385350
  • Title

    Automatic Parallelization with pMapper

  • Author

    Travinin, Nadya ; Hoffmann, Henry ; Bond, Robert ; Chan, Hector ; Kepner, Jeremy ; Wong, Edmund

  • Author_Institution
    Lincoln Lab., MIT, Lexington, MA
  • fYear
    2005
  • fDate
    Sept. 2005
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Algorithm implementation efficiency is key to delivering high-performance computing capabilities to demanding, high throughput signal and image processing applications and simulations. Significant progress has been made in optimization of serial programs, but many applications require parallel processing, which brings with it the difficult task of determining efficient mappings of algorithms. The pMapper infrastructure addresses the problem of performance optimization of multistage MATLABreg applications on parallel architectures. pMapper is an automatic performance tuning library written as a layer on top of pMatlab: Parallel Matlab Toolbox. While pMatlab abstracts the message-passing interface, the responsibility of mapping numerical arrays falls on the user. Choosing the best mapping for a set of numerical arrays is a nontrivial task that requires significant knowledge of programming languages, parallel computing, and processor architecture. pMapper automates the task of map generation. This abstract addresses the design details of pMapper and presents preliminary results
  • Keywords
    mathematics computing; message passing; parallel algorithms; parallel architectures; algorithm implementation efficiency; automatic parallelization; automatic performance tuning library; high-performance computing; image processing; message-passing interface; multistage MATLAB; numerical arrays; pMapper infrastructure; pMatlab; parallel Matlab toolbox; parallel architectures; parallel computing; parallel processing; performance optimization; processor architecture; programming languages; serial programs; Abstracts; Computational modeling; Computer languages; Image processing; Libraries; Optimization; Parallel architectures; Parallel processing; Signal processing; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Cluster Computing, 2005. IEEE International
  • Conference_Location
    Burlington, MA
  • ISSN
    1552-5244
  • Print_ISBN
    0-7803-9486-0
  • Electronic_ISBN
    1552-5244
  • Type

    conf

  • DOI
    10.1109/CLUSTR.2005.347017
  • Filename
    4154145