Ni-based FUSI gates: CMOS Integration for 45nm node and beyond

Author

Hoffmann, T. ; Veloso, A. ; Lauwers, A. ; Yu, H. ; Tigelaar, H. ; Van Dal, M. ; Chiarella, T. ; Kerner, C. ; Kauerauf, T. ; Shickova, A. ; Mitsuhashi, R. ; Satoru, I. ; Niwa, M. ; Rothschild, A. ; Froment, B. ; Ramos, J. ; Nackaerts, A. ; Rosmeulen, M. ;

Author_Institution

IMEC, Leuven

fYear

2006

fDate

11-13 Dec. 2006

Firstpage

1

Lastpage

4

Abstract

This work reports the first comprehensive evaluation of FUSI gates for manufacturability, covering the key aspects of integration, process control, reliability, matching, device design and circuit-level benefit. Thanks to a selective and controlled poly etch-back process, dual work-function Ni-based FUSI CMOS circuits with record ring oscillator performance (high-V_T applications) have been achieved (17ps at V_DD=1.1V and 20pA/mum I_off), meeting the ITRS 45nm node requirement for low power CMOS

Keywords

CMOS integrated circuits; design for manufacture; etching; integrated circuit design; low-power electronics; nickel; oscillators; 1.1 V; 17 ps; 45 nm; CMOS circuits; CMOS integration; FUSI gates; Ni; circuit-level benefit; device design; dual work-function; low power CMOS; matching; poly etch-back process; process control; reliability; ring oscillator; CMOS process; Circuits; Degradation; Etching; Germanium silicon alloys; High K dielectric materials; High-K gate dielectrics; MOS devices; Phase control; Silicon germanium;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2006. IEDM '06. International

Conference_Location

San Francisco, CA

Print_ISBN

1-4244-0439-8

Electronic_ISBN

1-4244-0439-8

Type

conf

DOI

10.1109/IEDM.2006.346759

Filename

4154178