DocumentCode :
2386322
Title :
Metrology strategy for next generation semiconductor manufacturing
Author :
Diebold, Alain C.
Author_Institution :
Int. SEMATECH, Austin, TX, USA
fYear :
2000
fDate :
2000
Firstpage :
91
Lastpage :
93
Abstract :
Metrology technology for the 100 nm and 70 nm generation faces many challenges. Although the areas of lithography, front end processes (transistor and capacitor fabrication), and (on chip) interconnect metrology are often considered independent, materials and process integration issues will drive a total picture viewpoint for next generation measurements. In this paper, the key measurement requirements and potential solutions are discussed in terms of a total solution. The results of recent studies will provide justification for the elements of the strategy
Keywords :
integrated circuit interconnections; integrated circuit manufacture; integrated circuit measurement; lithography; process control; 100 nm; 70 nm; front end processes; lithography; metrology strategy; next generation semiconductor manufacturing; on chip interconnect metrology; process integration issues; Dielectric measurements; Fabrication; Lithography; Metrology; Pollution measurement; Radar measurements; Scanning electron microscopy; Semiconductor device manufacture; Semiconductor device measurement; Semiconductor materials;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Manufacturing, 2000. Proceedings of ISSM 2000. The Ninth International Symposium on
Conference_Location :
Tokyo
ISSN :
1523-553X
Print_ISBN :
0-7803-7392-8
Type :
conf
DOI :
10.1109/ISSM.2000.993623
Filename :
993623
Link To Document :
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