An active 90nm inductive signal noise testchip with realistic microprocessor signal buses

Author

Elzinga, M. ; Chiprout, E. ; Dike, C. ; Wolfe, M. ; Kobrinsky, M.

Author_Institution

Intel Corp., Santa Clara, CA

fYear

0

fDate

0-0 0

Firstpage

1

Lastpage

5

Abstract

A 90nm inductance test chip that includes active drivers and on-die noise capture capabilities has been fabricated and measured in silicon. The purpose of the test chip was to quantify the inductive and capacitive noise effects on realistic microprocessor signal lines using typical inter-repeater lengths and signal-to-voltage-rail ratios. Measured results showed that signal inductive noise can potentially contend with capacitive noise and, in double-wide structures, can be of a greater effect than capacitive noise

Keywords

inductance; integrated circuit design; integrated circuit noise; logic design; system-on-chip; 90 nm; active drivers; capacitive noise effects; double wide structures; inductive noise effects; inductive signal noise test chip; microprocessor signal buses; on-die noise capture; Active noise reduction; Circuit noise; Circuit testing; Driver circuits; Inductance; Microprocessors; Noise measurement; Power measurement; Rails; Signal to noise ratio; inductance; microprocessor; noise; testchip;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuit Design and Technology, 2006. ICICDT '06. 2006 IEEE International Conference on

Conference_Location

Padova

Print_ISBN

1-4244-0097-X

Type

conf

DOI

10.1109/ICICDT.2006.220789

Filename

1669376