DocumentCode
2386485
Title
Design and Optimization of nanoCMOS devices using predictive atomistic physics-based process modeling
Author
Colombeau, B. ; Mok, K.R.C. ; Yeong, S.H. ; Benistant, F. ; Indajang, B. ; Tan, O. ; Yang, B. ; Li, Y. ; Jaraiz, M. ; Cowern, N.E.B. ; Chu, S.
Author_Institution
Chartered Semiconductor Manufacturing Ltd, 60 Woodlands Industrial Park D, Street 2, Singapore 738406. Tel: +65 6360.4504, fax +65 6362.2945, email: bcolombeau@charteredsemi.com
fYear
2006
fDate
Dec. 2006
Firstpage
1
Lastpage
4
Abstract
For the first time, this work shows that the design and optimization of nanoCMOS devices can be achieved from atomistic physics-based process modeling. Remarkable prediction of device characteristics can be obtained even for novel co-implant processes. This extends the strength of TCAD in manufacturing for future generations of nanoCMOS devices.
Keywords
Boron; CMOS technology; Design optimization; Electronics industry; Manufacturing industries; Nanoscale devices; Predictive models; Pulp manufacturing; Semiconductor device manufacture; Simulated annealing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2006. IEDM '06. International
Conference_Location
San Francisco, CA, USA
Print_ISBN
1-4244-0439-8
Electronic_ISBN
1-4244-0439-8
Type
conf
DOI
10.1109/IEDM.2006.346790
Filename
4154209
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