Scaleable low cost CMOS process with gate formation prior to implants

Author

Kraus, Karl-Heinz ; Schwartz, Wolfgang

Author_Institution

Texas Instruments, Freising, Germany

fYear

2000

fDate

2000

Firstpage

173

Lastpage

176

Abstract

It is very common that CMOS wafer fabs have distinct process solutions simultaneously in production for several technology generations. This adds complexity to manufacturing logistics, machine utilization and quality assurance. We have developed a scaleable CMOS modular platform that covers supply voltages of 1.8, 2.5, 3.3 and 5.0 Volt by adjusting only a few process parameters. Ninety percent of the process steps are common. This new CMOS process scheme can be modified to meet analog requirements, i.e. for radio frequency (RF) system applications

Keywords

CMOS analogue integrated circuits; integrated circuit manufacture; process control; 1.8 V; 2.5 V; 3.3 V; 5.0 V; CMOS process scheme; CMOS wafer fabs; gate formation; low cost CMOS process; machine utilization; manufacturing logistics; process parameters; quality assurance; radio frequency system applications; scaleable CMOS modular platform; supply voltages; CMOS process; CMOS technology; Costs; Implants; Instruments; MOS devices; Manufacturing; Production; Radio frequency; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Manufacturing, 2000. Proceedings of ISSM 2000. The Ninth International Symposium on

Conference_Location

Tokyo

ISSN

1523-553X

Print_ISBN

0-7803-7392-8

Type

conf

DOI

10.1109/ISSM.2000.993642

Filename

993642