DocumentCode
2387008
Title
Simulation of patterning-induced circuit performance variability
Author
Nackaerts, Axel ; Verhaegen, Staf ; Ramos, Javier ; Vandenberghe, Geert ; Biesemans, Serge
Author_Institution
IMEC vzw, Heverlee
fYear
0
fDate
0-0 0
Firstpage
1
Lastpage
4
Abstract
In this paper the interactions between layout, lithography, and circuit performance variability are studied by simulating Monte-Carlo layout variations of circuits
Keywords
Monte Carlo methods; design for manufacture; integrated circuit layout; integrated circuit reliability; lithography; nanopatterning; CD uniformity; Monte-Carlo layout; circuit layout; circuit performance variability; circuit simulation; design for manufacturing; lithography simulation; patterning-induced circuit performance; Analytical models; CMOS technology; Circuit optimization; Circuit simulation; Delay; Graphics; Lithography; Ring oscillators; Shape; Software tools; CD uniformity; circuit simulation; design for manufacturing; lithography simulation; overlay; variability;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuit Design and Technology, 2006. ICICDT '06. 2006 IEEE International Conference on
Conference_Location
Padova
Print_ISBN
1-4244-0097-X
Type
conf
DOI
10.1109/ICICDT.2006.220827
Filename
1669414
Link To Document