Title :
New modules, materials and architectures for Flash Memory scaling
Author :
Molas, G. ; De Salvo, B.
Author_Institution :
CEA-Leti, Grenoble
Abstract :
In this paper, different solutions, fully compatible with current CMOS process, to extend the floating gate flash memory technology to the 45nm and possibly 32nm nodes, are presented. In particular, new modules (discrete traps memories, and more specifically silicon nanocrystal memories), new materials (high-k materials integrated in the tunnel barrier and/or interpoly layer) and innovative architectures (FinFlash memories) are discussed
Keywords :
flash memories; high-temperature electronics; nanostructured materials; scaling circuits; silicon; 32 nm; 45 nm; CMOS; FinFlash memories; discrete traps memories; flash memory scaling; high-k materials; innovative architectures; interpoly layer; silicon nanocrystal memories; tunnel barrier; CMOS technology; Electron traps; FETs; Flash memory; High K dielectric materials; High-K gate dielectrics; Memory architecture; Nanocrystals; Nonvolatile memory; Voltage;
Conference_Titel :
Integrated Circuit Design and Technology, 2006. ICICDT '06. 2006 IEEE International Conference on
Conference_Location :
Padova
Print_ISBN :
1-4244-0097-X
DOI :
10.1109/ICICDT.2006.220836
