Author :
Singanamalla, R. ; Ravit, C. ; Vellianitis, G. ; Petry, J. ; Paraschiv, V. ; van Zijl, J.P. ; Brus, S. ; Verheijen, M. ; Weemaes, R.G.R. ; Kaiser, M. ; van Berkum, J.G.M. ; Bancken, P. ; Vos, R. ; Yu, H. ; De Meyer, K. ; Kubicek, S. ; Biesemans, S. ; Hook
Abstract :
We report band-edge pFET threshold voltage (Vt ~ 0.28 V) for MoOxNy on HfSiON gate dielectric using a standard high temperature gate first metal-inserted poly-stack (MIPS) process flow. We also report p-FETs Vt of 0.45 V using a MoO x/SiON gate stack, meeting the requirement for 45nm high-V t CMOS technology. 30 % improvement in performance compared to our base-line poly-Si/SiON was observed by using both MoOx/SiON and MoOx/HfSiON gate stacks. Excellent dielectric integrity is also shown for devices with MoOxNy gated stack such as device mobility, NBTI and TDDB characteristics, as compared to our base-line poly/SiON devices
Keywords :
CMOS integrated circuits; MOSFET; dielectric materials; electrodes; hafnium compounds; molybdenum compounds; silicon compounds; 0.45 V; 45 nm; CMOS technology; HfSiON; MoON; band-edge pFET; dielectric integrity; gate dielectric; metal gate electrodes; metal-inserted poly-stack process flow; pMOSFET devices; threshold voltage; Atherosclerosis; CMOS technology; Dielectrics; Electrodes; Fabrication; Implants; MOSFET circuits; Plasma applications; Plasma properties; Tin;
