Low noise amplifier linearization for near millimeter wave band applications

Author

Seiedhosseinzadeh, N. ; Nabavi, A.

Author_Institution

Fac. of Electr. & Comput. Eng., Tarbiat Modares Univ., Tehran, Iran

fYear

2012

fDate

24-26 Dec. 2012

Firstpage

48

Lastpage

51

Abstract

In this paper, an improved post linearization technique is presented for high frequency low noise amplifiers (LNAs). It employs two auxiliary diode-connected NMOS-PMOS transistors with a resistor and a capacitor which increases the linearity while partially compensates the gain reduction. This technique improves the IIP3 more than 7 dB by reducing the third-order nonlinearity coefficient of output current. The proposed method has been implemented on a two-stage LNA consisting of a common-source stage and a cascode stage. This LNA has been simulated in a 0.18μm RF CMOS technology consuming only 13.9 mW from a single 1.8-V power supply.

Keywords

CMOS analogue integrated circuits; HF amplifiers; MOSFET; capacitors; low noise amplifiers; millimetre wave amplifiers; millimetre wave diodes; millimetre wave integrated circuits; resistors; RF CMOS technology; auxiliary diode-connected NMOS-PMOS transistor; capacitor; cascode stage; common-source stage; high frequency low noise amplifier; improved post linearization technique; near millimeter wave band application; power 13.9 mW; resistor; size 0.18 mum; third-order nonlinearity coefficient; two-stage LNA; voltage 1.8 V; CMOS; Post linearization; high frequencies; low noise amplifier;

fLanguage

English

Publisher

ieee

Conference_Titel

Millimeter -Wave and Terahertz Technologies (MMWaTT), 2012 Second Conference on

Conference_Location

Tehran

ISSN

2157-0965

Print_ISBN

978-1-4673-4954-3

Type

conf

DOI

10.1109/MMWaTT.2012.6532165

Filename

6532165