DocumentCode
2388379
Title
Stencil mask ion implantation technology for sub 100 nm technology node
Author
Shibata, Takeshi ; Suguro, Kyoichi ; Sugihara, Kazuyoshi ; Nishihashi, Tsutomu
Author_Institution
Semicond. Co., Toshiba Corp., Japan
fYear
2001
fDate
29-30 Nov. 2001
Firstpage
11
Lastpage
14
Abstract
Recently we develop Stencil Mask ion Implantation Technology (SMIT). Using SMIT, the cost of fabricating semiconductor devices can be reduced. In view of the ion beam profile and system configuration, the SMIT system is advantageous in term of device performance. We propose SMIT and show some fundamental results of SMIT in this report.
Keywords
ion implantation; masks; semiconductor technology; 100 nm; semiconductor device fabrication; stencil mask ion implantation; sub-100 nm technology; Costs; Electrostatics; Fabrication; Ion beams; Ion implantation; Manufacturing processes; Resists; Semiconductor device manufacture; Semiconductor devices; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Junction Technology, 2001. IWJT. Extended Abstracts of the Second International Workshop on
Conference_Location
Tokyo, Japan
Print_ISBN
4-89114-019-4
Type
conf
DOI
10.1109/IWJT.2001.993816
Filename
993816
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