Finite wordlength requirements for adaptive signal processing elements in digital QAM ADSL systems

Asymmetric digital subscriber line (ADSL) services attempt to provide high rate data transmission on a variety of copper loops both inside and outside the carrier service area. The data rates range from 1.6 Mbps half-duplex on long loops to 6 Mbps half-duplex on shorter loops. Thus far, several studies have been performed on the performance of different ADSL system architectures, but little attention has been paid to the wordlength requirements of the transceiver ASIC that is at the heart of an economical implementation. In this paper we focus on the adaptive equalizer block of the system proposed by Daneshrad and Samueli (1992). Results of studies are presented that show the minimum word lengths for the front-end analog-to-digital converter (A/D) as well as the different signals within the adaptive filters of the equalizer. For both the feedforward equalizer (FFE) and the decision feedback equalizer (DFE) wordlength requirements of four signals are studied (a) the filter input, (b) the multiply-accumulator at the output of the filter, (c) the number of bits required to store and update the adaptive coefficient, (d) the number of coefficient bits actually used in the filtering operation. It is found that a 10 bit A/D is sufficient for such a system, and that all other signals studied require no more than 22 bits of dynamic range. Armed with such information, the system designer can use the minimum word lengths without sacrificing system performance, while at the same time reducing the size, power consumption, and cost of the transceiver ASIC (application specific integrated circuit)