The expanded delta fast packet switch

We describe a new delta-based ATM switch architecture which uses fabric expansion to ease internal blocking. The control of the switch is completely distributed; thus, it scales well to large sizes. The switch employs a combined external input-output buffering strategy, and operates in such a way so that output buffer overflows never happen. An analytical model, that takes into account this backpressure mechanism, is developed for arbitrary switch size, input buffer size, output buffer size, and expansion factor. Computer simulations are used to validate the analysis and to examine the performance under bursty traffic. It is shown that reasonable expansion factors are required to achieve high performance for large switch sizes. It is also shown that memory savings are achieved by avoiding output buffer overflows. Finally, a distinctive feature of the proposed architecture is that internal node buffering can be used without disturbing the cell sequence integrity