DocumentCode :
2388887
Title :
Long term gate dielectric stress -- a timely method?
Author :
Vollertsen, R.-P. ; Pompl, T. ; Duschl, R. ; Kerber, A. ; Kerber, M. ; Röhner, M. ; Schwab, R.
Author_Institution :
Infineon Technol. AG, Munich
fYear :
2006
fDate :
11-13 Dec. 2006
Firstpage :
1
Lastpage :
4
Abstract :
Long term stresses and their benefits in assessing gate dielectric reliability are reviewed. Stress times up to three years have been reached and surprising results besides model verification are presented. Reported time saving workarounds and their limitations are considered. Finally future application and challenges of long term stress are discussed. The post-first-breakdown behavior is given as an application example
Keywords :
electric breakdown; reliability; gate dielectric reliability; long term gate dielectric stress; post-first-breakdown behavior; Acceleration; Accelerometers; Degradation; High K dielectric materials; High-K gate dielectrics; Integrated circuit modeling; Integrated circuit reliability; Stress; Temperature; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2006. IEDM '06. International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0438-X
Electronic_ISBN :
1-4244-0439-8
Type :
conf
DOI :
10.1109/IEDM.2006.346894
Filename :
4154313
Link To Document :
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