Title :
An efficient FSE/DFE-based HDSL equalizer with new adaptive algorithms
Author :
Hwang, Cheng-I ; Tang, Tzu-Chiang ; Lin, David W. ; Chen, Sau-Gee
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
We consider the design of an efficient FSE/DFE-based HDSL equalizer. For this, several variants of the conventional LMS algorithm and their delayed versions are investigated. In addition, two new adaptive algorithms are also studied which yield lower computational complexity but similar performance when compared to conventional algorithms. We also propose a way to initialize the DFE coefficients for fast convergence. Extensive simulation is conducted to evaluate various algorithms´ performance and to facilitate hardware design. Due to time constraint, the present design employs a conventional algorithm. It is verified with the Verilog and Opus VLSI CAD tools. Layout design of the equalizer chip has been taped out for foundry fabrication
Keywords :
VLSI; adaptive equalisers; circuit CAD; circuit layout; circuit layout CAD; computational complexity; convergence of numerical methods; decision feedback equalisers; filtering theory; least mean squares methods; subscriber loops; DFE coefficients; FSE/DFE; HDSL equalizer; LMS algorithm; Opus VLSI CAD tools; Verilog VLSI CAD tools; adaptive filtering algorithms; decision-feedback equalizer; equalizer chip; fast convergence; foundry fabrication; fractionally spaced equalizer; hardware design; layout design; simulation; Adaptive algorithm; Algorithm design and analysis; Computational complexity; Computational modeling; Convergence; Decision feedback equalizers; Delay; Hardware; Least squares approximation; Time factors;
Conference_Titel :
Communications, 1994. ICC '94, SUPERCOMM/ICC '94, Conference Record, 'Serving Humanity Through Communications.' IEEE International Conference on
Conference_Location :
New Orleans, LA
Print_ISBN :
0-7803-1825-0
DOI :
10.1109/ICC.1994.369043