DocumentCode
2390553
Title
Advantages of dual-loop frequency synthesizers for GSM applications
Author
Aytur, Turgut ; Khoury, John
Author_Institution
Bell Labs, Lucent Technol., Holmdel, NJ, USA
Volume
1
fYear
1997
fDate
9-12 Jun 1997
Firstpage
17
Abstract
A dual-loop frequency synthesizer topology using a wideband primary loop and programmable reference loop is analyzed and simulated. This architecture offers improved noise performance when compared with conventional designs. The IC compatible dual-loop design uses phase/frequency translation rather than frequency division
Keywords
cellular radio; frequency synthesizers; integrated circuit design; integrated circuit noise; GSM applications; IC compatible design; dual-loop frequency synthesizers; noise performance; phase/frequency translation; programmable reference loop; wideband primary loop; Filters; Frequency synthesizers; GSM; Integrated circuit noise; Low-frequency noise; Noise level; Phase locked loops; Phase noise; Topology; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN
0-7803-3583-X
Type
conf
DOI
10.1109/ISCAS.1997.608501
Filename
608501
Link To Document