• DocumentCode
    2390568
  • Title

    Lithography Challenges for 32nm Technologies and Beyond

  • Author

    Sivakumar, S.

  • Author_Institution
    Portland Technol. Dev., Intel Corp., Hillsboro, OR
  • fYear
    2006
  • fDate
    11-13 Dec. 2006
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Advances in lithography, which have been the critical driving force behind the remarkable scaling trend of transistors and integrated circuits over several generations of process technologies, are becoming increasingly more difficult, complex and expensive. Moreover, newer lithography techniques have significant design and layout collateral which makes their implementation challenging. This paper will illustrate the lithography technologies being considered for the future, their challenges and limitations and the co-optimization needed on the device, circuit and layout fronts to facilitate continued scaling
  • Keywords
    lithography; semiconductor technology; 32 nm; 32nm technologies; co optimization; lithography; scaling trend; Apertures; Integrated circuit technology; Lenses; Lighting; Lithography; Manufacturing; Optical design; Optical imaging; Refractive index; Resists;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 2006. IEDM '06. International
  • Conference_Location
    San Francisco, CA
  • Print_ISBN
    1-4244-0438-X
  • Electronic_ISBN
    1-4244-0439-8
  • Type

    conf

  • DOI
    10.1109/IEDM.2006.346952
  • Filename
    4154387