DocumentCode :
2390605
Title :
Doubling or quadrupling MuGFET fin integration scheme with higher pattern fidelity, lower CD variation and higher layout efficiency
Author :
Rooyackers, R. ; Augendre, E. ; Degroote, B. ; Collaert, N. ; Nackaerts, A. ; Dixit, A. ; Vandeweyer, T. ; Pawlak, B. ; Ercken, M. ; Kunnen, E. ; Dilliway, G. ; Leys, F. ; Loo, R. ; Jurczak, M. ; Biesemans, S.
Author_Institution :
IMEC, Leuven
fYear :
2006
fDate :
11-13 Dec. 2006
Firstpage :
1
Lastpage :
4
Abstract :
Multiple gate field effect transistors (MuGFET) with a fin pitch down to 50nm obtained with 193nm optical lithography and proposed fin quadrupling patterning method are demonstrated. The fins patterned with this technique feature improved CD control and line width roughness. High fin density in combination with Si-SEG that allows merging individual fins outside the spacer region lead to reduction in parasitic source/drain-resistance and 3-fold increase in drive current per surface unit
Keywords :
field effect transistors; photolithography; silicon; 193 nm; 50 nm; CD variation; MuGFET; Si-SEG; fin integration; fin pitch; fin quadrupling patterning; layout efficiency; multiple gate field effect transistors; optical lithography; pattern fidelity; Etching; FETs; Germanium silicon alloys; Lithography; Merging; Resists; Rough surfaces; Silicon compounds; Silicon germanium; Stability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2006. IEDM '06. International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0438-X
Electronic_ISBN :
1-4244-0439-8
Type :
conf
DOI :
10.1109/IEDM.2006.346954
Filename :
4154389
Link To Document :
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