Design of a [DC - 20 GHz] Buffered Track and Hold Circuit in InP DHBT Technology

Author

El Aabbaoui, Hassan ; Gorisse, Benoît ; Rolland, Nathalie ; Benlarbi-Delaï, Aziz ; Fel, Nicolas ; Allouche, Virginie ; Leclerc, Pascal ; Riondet, Bernard ; Rolland, Paul-Alain

Author_Institution

Lille 1 Univ., Villeneuve d´´Ascq

fYear

2007

fDate

8-10 Oct. 2007

Firstpage

339

Lastpage

342

Abstract

This paper describes the design and realization of a buffered track and hold (BTH) circuit fabricated in InP-InGaAs-InP double heterojunction bipolar transistor (DHBT) technology (F_T = 180 GHz). This BTH is intended for a single shot, 20 GHz bandwidth and 40 GS/s sampling frequency digitizer based on the non simultaneous spatial sampling principle. Based on a high speed switched emitter follower (SEF), the BTH can ensure 20 GHz bandwidth signal compatible with the targeted objectives. First experimental results in the frequency domain and a novel optimized architecture leading to a combination between the SEF and the Cherry Hooper design based buffer are also presented.

Keywords

III-V semiconductors; bipolar MMIC; buffer circuits; frequency-domain analysis; heterojunction bipolar transistors; indium compounds; sampling methods; BTH circuit; Cherry Hooper design; DHBT technology; InP-InGaAs-InP; buffered track and hold circuit; double heterojunction bipolar transistor; frequency 0 GHz to 20 GHz; frequency domain analysis; sampling frequency digitizer; spatial sampling principle; switched emitter follower; Bandwidth; CMOS technology; Circuits; DH-HEMTs; Frequency; Indium phosphide; Radar tracking; Sampling methods; Signal analysis; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Wireless Technologies, 2007 European Conference on

Conference_Location

Munich

Print_ISBN

978-2-87487-003-3

Type

conf

DOI

10.1109/ECWT.2007.4404016

Filename

4404016