• DocumentCode
    2390683
  • Title

    Improving the Cell Characteristics Using Low-k Gate Spacer in 1Gb NAND Flash Memory

  • Author

    Kang, Daewoong ; Jang, Sungnam ; Lee, Kyongjoo ; Kim, Jinjoo ; Kwon, Hyukje ; Lee, Wonseong ; Park, Byung Gook ; Lee, Jong Duk ; Shin, Hyungcheol

  • Author_Institution
    Inter-Univ. Semicond. Res. Center, Seoul Nat. Univ.
  • fYear
    2006
  • fDate
    11-13 Dec. 2006
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Floating gate interference resulting from capacitive coupling through parasitic capacitors surrounding the floating gate degrades the cell characteristics such as current, speed and cell Vth distribution. For the first time, we have introduced the cell characteristics improved using low-k dielectric of gate spacer such as oxide and air gap in 1Gb NAND flash memory
  • Keywords
    NAND circuits; capacitors; flash memories; NAND flash memory; capacitive coupling; cell characteristics; floating gate interference; low k gate spacer; parasitic capacitors; Capacitors; Degradation; Dielectrics; Dry etching; Interference; Nonvolatile memory; Parasitic capacitance; Random access memory; Silicon compounds; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 2006. IEDM '06. International
  • Conference_Location
    San Francisco, CA
  • Print_ISBN
    1-4244-0438-X
  • Electronic_ISBN
    1-4244-0439-8
  • Type

    conf

  • DOI
    10.1109/IEDM.2006.346956
  • Filename
    4154391
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2390683