Title :
CMOS and Interconnect Reliability - Interconnect, ESD, and Failure Analysis
Keywords :
Active circuits; Conductivity; Design optimization; Electromigration; Electrostatic discharge; Failure analysis; FinFETs; Integrated circuit interconnections; Kinetic theory; Semiconductor device reliability;
Conference_Titel :
Electron Devices Meeting, 2006. IEDM '06. International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0438-X
DOI :
10.1109/IEDM.2006.346964
