Title :
Global lower bounds for the VLSI macrocell floorplanning problem using semidefinite optimization
Author :
Takouda, P.L. ; Anjos, M.F. ; Vannelli, A.
Author_Institution :
Dept. of Manage. Sci., Waterloo Univ., Ont., Canada
Abstract :
We investigate the application of semidefinite programming (SDP) techniques to the VLSI macrocell floorplanning problem. We propose a mixed-integer SDP formulation of the problem which leads to new SDP relaxations. This approach has been implemented and we report global lower bounds for some MCNC benchmark macrocell problems.
Keywords :
VLSI; circuit optimisation; integrated circuit layout; MCNC benchmark macrocell problems; SDP relaxations; VLSI macrocell floorplanning problem; global lower bounds; mixed-integer SDP formulation; semidefinite optimization; Application software; Application specific integrated circuits; Costs; Design automation; Engineering management; Laboratories; Linear programming; Macrocell networks; Symmetric matrices; Very large scale integration;
Conference_Titel :
System-on-Chip for Real-Time Applications, 2005. Proceedings. Fifth International Workshop on
Print_ISBN :
0-7695-2403-6
DOI :
10.1109/IWSOC.2005.69
