DocumentCode :
2391280
Title :
Designing a VAX for high performance
Author :
Fossum, Tryggve ; Fite, David B., Jr.
Author_Institution :
Digital Equipment Corp., Boxborough, MA, USA
fYear :
1990
fDate :
Feb. 26 1990-March 2 1990
Firstpage :
36
Lastpage :
43
Abstract :
The strategy used by the designers to achieve the high performance of the VAX 9000 is described. The strategy chosen was to apply reduced-instruction-set-computer-like techniques in implementing the VAX architecture. VAX instructions were broken into small, simple tasks, and dedicated hardware optimized for each task was designed. The result is a network of specialized processors, operating in parallel, executing instructions quickly. The most common, simple instructions are executed at the rate of 1/cycle. To increase system performance further, a high-density, high-speed technology was specifically developed for the VAX 9000. Emitter-coupled-logic (ECL) macrocell arrays (MCA3s), high-density signal carriers (HDSCs), and multichip units (MCUs) allow efficient use of limited physical area. The VAX 9000 scalar and vector processors reside on a single planar board. Three MCU slots are reserved for the optional VBOX vector processor. Integrating the vector processor directly with the scalar processor kept critical interconnects short, reducing vector instruction overhead.<>
Keywords :
DEC computers; mainframes; parallel architectures; parallel machines; reduced instruction set computing; HDSCs; MCA3s; MCUs; RISC; VAX 9000; VAX architecture; VAX instructions; VBOX vector processor; critical interconnects; dedicated hardware; emitter-coupled logic; high performance; high-density signal carriers; macrocell arrays; multichip units; network; parallel; planar board; reduced-instruction-set-computer-like techniques; scalar processor; specialized processors; vector instruction overhead; Application software; Computer architecture; Control systems; Design optimization; Hardware; Instruction sets; Pipelines; Reduced instruction set computing; Switches; System performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Compcon Spring '90. Intellectual Leverage. Digest of Papers. Thirty-Fifth IEEE Computer Society International Conference.
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-2028-5
Type :
conf
DOI :
10.1109/CMPCON.1990.63651
Filename :
63651
Link To Document :
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