DocumentCode
2391542
Title
Performance Boost using a New Device Design Methodology Based on Characteristic Current for Low-Power CMOS
Author
Yoshida, E. ; Momiyama, Y. ; Miyamoto, M. ; Saiki, T. ; Kojima, M. ; Satoh, S. ; Sugii, T.
Author_Institution
Fujitsu Labs. Ltd., Akiruno
fYear
2006
fDate
11-13 Dec. 2006
Firstpage
1
Lastpage
4
Abstract
The authors proposes a characteristic current (I_chr) to replace the conventional saturation drive current used to estimate approximate CMOS inverter delay times for deeply scaled devices. The authors also present a new device design method based on I_chr to achieve a higher operation frequency for CMOS inverter circuits. The new method shortens propagation delay time (Tpd) by 15%
Keywords
CMOS integrated circuits; invertors; low-power electronics; CMOS inverter delay circuits; low-power CMOS characteristic current; saturation drive current; Circuits; Current measurement; Delay effects; Delay estimation; Design methodology; Frequency; Inverters; Parasitic capacitance; Propagation delay; SPICE;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2006. IEDM '06. International
Conference_Location
San Francisco, CA
Print_ISBN
1-4244-0438-X
Electronic_ISBN
1-4244-0439-8
Type
conf
DOI
10.1109/IEDM.2006.346995
Filename
4154430
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