• DocumentCode
    2391595
  • Title

    Very high radix scalable Montgomery multipliers

  • Author

    Kelley, Kyle ; Harris, David

  • Author_Institution
    Harvey Mudd Coll., Claremont, CA, USA
  • fYear
    2005
  • fDate
    20-24 July 2005
  • Firstpage
    400
  • Lastpage
    404
  • Abstract
    This paper describes a very high radix scalable Montgomery multiplier. It extends the radix-2 Tenca-Kog scalable architecture using w × v - bit integer multipliers in place of AND gates. The design can perform 1024-bit modular exponentiation in 6.6 ms using 2847 4-input lookup tables and 32 16 × 16 multipliers, making it the fastest scalable design yet reported.
  • Keywords
    digital arithmetic; logic design; multiplying circuits; table lookup; 6.6 ms; AND gates; Montgomery multipliers; integer multipliers; lookup tables; modular exponentiation; Cryptography; Databases; Delay; Design optimization; Educational institutions; Field programmable gate arrays; Hardware; Pipelines; Process design; Table lookup;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System-on-Chip for Real-Time Applications, 2005. Proceedings. Fifth International Workshop on
  • Print_ISBN
    0-7695-2403-6
  • Type

    conf

  • DOI
    10.1109/IWSOC.2005.111
  • Filename
    1530980
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2391595