DocumentCode :
2391699
Title :
A 622-MHz interpolating ring VCO with temperature compensation and jitter analysis
Author :
Chan, Wing-Hong ; Lau, Jack ; Buchwald, Aaron
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong
Volume :
1
fYear :
1997
fDate :
9-12 Jun 1997
Firstpage :
25
Abstract :
A 622-MHz interpolating VCO has been designed using a 0.72 μm CMOS technology for use as a clock recovery circuit in ATM Sonet OC-12 applications. A temperature compensated biasing scheme is adopted so that the VCO maintains its center frequency and tuning range throughout the temperature range 0°C-130°C. Simulation shows the sensitivity of the VCO center frequency achieves -100ppm/°C. Jitter analysis indicates an rms timing jitter due to thermal noise to be 365-fs. Power consumption is 65-mW from a 5-V supply
Keywords :
CMOS analogue integrated circuits; SONET; asynchronous transfer mode; compensation; integrated circuit noise; interpolation; jitter; thermal noise; voltage-controlled oscillators; 0 to 130 degC; 0.72 micron; 365 fs; 5 V; 622 MHz; 65 mW; ATM Sonet OC-12 applications; CMOS technology; RMS timing jitter; center frequency; clock recovery circuit; interpolating ring VCO; jitter analysis; power consumption; sensitivity; temperature compensated biasing scheme; temperature compensation; thermal noise; tuning range; CMOS technology; Circuit optimization; Circuit simulation; Clocks; Frequency; Jitter; Temperature distribution; Temperature sensors; Tuning; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
Type :
conf
DOI :
10.1109/ISCAS.1997.608506
Filename :
608506
Link To Document :
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