DocumentCode :
2391764
Title :
SiN Gate Dielectric with Oxygen-enriched Interface (OI-SiN) Utilizing Dual-core-SiON Technique for hp65-SoC LOP Application
Author :
Tsujikawa, Shimpei ; Umeda, Hiroshi ; Hayashi, Takashi ; Ohnishi, Kazuhiro ; Shiga, Katsuya ; Kawase, Kazumasa ; Yugami, Jiro ; Yoshimura, Hidefumi ; Yoneda, Masahiro
Author_Institution :
Renesas Technol. Corp., Hyogo
fYear :
2006
fDate :
11-13 Dec. 2006
Firstpage :
1
Lastpage :
4
Abstract :
A solution of utilizing an N-rich SiON gate dielectric toward achieving highly reliable pMOS is demonstrated. The solution consists of a combination of two techniques: (1) a SiN-based gate dielectric with oxygen-enriched interface (OI-SiN) enabling nMOS and pMOS characteristics superior to plasma-nitrided oxides (PNO) and (2) a dual-core-SiON technique in which SiON in pMOS is selectively thickened by fluorine ion implantation to the poly-Si layer with the aim of acquiring NBTI immunity. The latter improved the NBTI immunity of pMOS with OI-SiN gate dielectrics to a level comparable to that with conventional PNO. Although the thickening of SiON using dual-core-SiON technique naturally decreases pMOS on-current, the performance remains superior to that with PNO
Keywords :
MOSFET; dielectric materials; ion implantation; silicon compounds; system-on-chip; NBTI immunity; SiN; SiON; dual-core technique; fluorine ion implantation; gate dielectric; highly reliable pMOS; hp65-SoC LOP application; oxygen-enriched interface; plasma-nitrided oxides; poly-Si layer; Dielectric substrates; Ion implantation; Leakage current; MOS devices; Niobium compounds; Nitrogen; Oxidation; Plasma immersion ion implantation; Silicon compounds; Titanium compounds;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2006. IEDM '06. International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0438-X
Electronic_ISBN :
1-4244-0439-8
Type :
conf
DOI :
10.1109/IEDM.2006.347007
Filename :
4154442
Link To Document :
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