Systolic array-based string matching unit for spam blocking

In this paper, we propose a hardware solution to assist spam blocking. We determined the most computationally intensive task in spam blocking, i.e., string matching, and here present a systolic array implementation in hardware for it to increase its efficiency and performance. We also present a technique to embed this systolic array into another array to be implemented on FPGA. We have synthesized our proposed hardware on the vertex-II FPGA to prove the correctness of the hardware and to determine the time and area requirements.