Author :
Hayashi, T. ; Nishida, Y. ; Sakashita, S. ; Mizutani, M. ; Yamanari, S. ; Higashi, M. ; Kawahara, T. ; Inoue, M. ; Yugami, J. ; Tsuchimoto, J. ; Shiga, K. ; Murata, N. ; Sayama, H. ; Yamashita, T. ; Oda, H. ; Kuroi, T. ; Eimori, T. ; Inoue, Y.
Abstract :
High performance LSTP CMISFETs with poly-Si/TiN hybrid gate and high-k dielectric have been studied. Gate depletion is successfully suppressed by in-situ phosphorus doped poly-Si gate for NMIS and by TiN metal gate for PMIS. Vth control for pMIS is accomplished by fluorine implantation into substrate. Optimization of HfSiON formation and TiN removal process is the key to achieve high-reliability. It is demonstrated that this cost-worthy process provides performance which is competitive to reported dual metal CMOS
Keywords :
CMOS integrated circuits; MISFET; hafnium compounds; high-k dielectric thin films; ion implantation; optimisation; reliability; silicon compounds; titanium compounds; LSTP CMISFETs; Si-TiN-HfSiON; dual metal CMOS; fluorine ion implantation; gate depletion; high-k dielectric; high-reliability; hybrid gate dielectric; nMIS; optimization; pMIS; poly-silicon gate; CMOS process; Costs; Dielectric substrates; Fabrication; Hafnium; High K dielectric materials; High-K gate dielectrics; Production; Threshold voltage; Tin;
