A low-power all-digital phase modulator pair for LINC transmitters

Author

Tsai, Ping-Yuan ; Chen, Tsan-Wen ; Lee, Chen-Yi

Author_Institution

Dept. of Electron. Eng. & Inst. of Electron., Nat. Chiao-Tung Univ., Hsinchu, Taiwan

fYear

2011

fDate

26-28 Sept. 2011

Firstpage

48

Lastpage

51

Abstract

This paper presents a low-power all-digital phase modulator (PM) pair to generate constant-envelope signals for LINC transmitters. To reduce the power overhead, an open-loop delay line based phase shifter with a continuous locking scheme is adopted for the PM design. This design is implemented by 90 nm CMOS technology with active area of 0.1892 mm². The PM provides 8-bit resolution with RMS error 0.33° at IF frequency 80 MHz, and the power consumption is only 885 uW with 1.0 V supply voltage. Considering a 64-QAM OFDM system, the EVM of -31.87 dB can be achieved by using the proposed PM pair.

Keywords

CMOS analogue integrated circuits; OFDM modulation; delay lines; integrated circuit design; low-power electronics; modulators; phase modulation; phase shifters; power amplifiers; quadrature amplitude modulation; signal generators; transmitters; 64-QAM OFDM system; CMOS technology; EVM; IF frequency; LINC transmitter; RMS error; constant-envelope signal generation; continuous locking scheme; frequency 80 MHz; linear amplification with nonlinear component; low-power all-digital phase modulator pair; open-loop delay line; phase shifter; power consumption; power overhead reduction; size 90 nm; supply voltage; voltage 1 V; Clocks; Delay; Linearity; Logic gates; OFDM; Phase modulation; Radio transmitters;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference (SOCC), 2011 IEEE International

Conference_Location

Taipei

ISSN

2164-1676

Print_ISBN

978-1-4577-1616-4

Electronic_ISBN

2164-1676

Type

conf

DOI

10.1109/SOCC.2011.6085074

Filename

6085074