DocumentCode :
2392459
Title :
The incremental-cost approach for synthesis of CCD 4-valued unary functions
Author :
Abd-El-Barr, M.H. ; Hoang, T.D. ; Vranesic, Z.G.
Author_Institution :
Dept. of Comput. Sci., Saskatchewan Univ., Saskatoon, Sask., Canada
fYear :
1988
fDate :
0-0 1988
Firstpage :
82
Lastpage :
89
Abstract :
A novel approach to the synthesis of one-variable four-valued functions using CCDs (charge-coupled devices) is presented. Starting at zero cost, a search is conducted for the possible functions that can be realized using basic CCD gate structures. These functions are recorded in a list. At a given cost C, each of the four possibilities of using the addition, overflow, inhibit, and multiplication as an output gate is considered. For each possibility, the set of possible inputs to the gate are determined and used. Only those outputs which are not covered at lower costs are added to the list. The cost is then incremented by one and the search is repeated for new functions. The process terminates when all 256 possible functions are in the list. Using this approach, it is shown that in 195 functions (76% of the total) there is a cost improvement compared to existing approaches.<>
Keywords :
charge-coupled device circuits; logic CAD; logic circuits; many-valued logics; CCD 4-valued unary functions synthesis; addition; incremental-cost approach; inhibit; multiplication; overflow; Area measurement; Charge coupled devices; Circuit synthesis; Cost function; Logic circuits; Logic design; Logic functions; Potential well; Semiconductor device measurement; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multiple-Valued Logic, 1988., Proceedings of the Eighteenth International Symposium on
Conference_Location :
Palma de Mallorca, Spain
Print_ISBN :
0-8186-0859-5
Type :
conf
DOI :
10.1109/ISMVL.1988.5154
Filename :
5154
Link To Document :
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