Title :
High-level optimization of pipeline design
Author :
Campbell, Jennifer P L ; Day, Nancy A.
Author_Institution :
Sch. of Comp. Sci., Waterloo Univ., Ont., Canada
Abstract :
We describe an automatic method for synthesizing pipelined processors that optimizes throughput and automatically resolves control and data hazards. We present rules that describe how to resolve hazards based on the data dependencies between functional units. We demonstrate our method by showing optimal pipeline configurations of the DLX.
Keywords :
abstract data types; circuit optimisation; hazards and race conditions; high level synthesis; pipeline processing; Boolean variables; DLX microprocessor; abstract description; automatic method; control hazards; data dependency; data hazards; high-level optimization; optimal configurations; optimized throughput; pipeline design; pipelined processors; universal pipeline; Automatic control; Circuits; Clocks; Concurrent computing; Design optimization; Hazards; Optimization methods; Pipeline processing; Registers; Throughput;
Conference_Titel :
High-Level Design Validation and Test Workshop, 2003. Eighth IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-8236-6
DOI :
10.1109/HLDVT.2003.1252473
