A reduced signal feed-through 6-tap pre-emphasis circuit for use in a 10GB/S backplane communications system

Author

Tai, Harry ; Noel, Peter ; Kwasniewski, Tad

Author_Institution

Dept. of Electron., Carleton Univ., Ottawa, ON, Canada

fYear

2011

fDate

26-28 Sept. 2011

Firstpage

114

Lastpage

117

Abstract

The current mode digital-to-analog converter (iDAC) has been widely used in finite-impulse response (FIR) filter implementations as it is well-suited for high-speed operation. This paper proposes a novel solution to reduce the signal feed-through problem commonly encountered in current mode digital-to-analog converters in pre-emphasis circuits. To improve the eye opening, the circuit must be able to limit the flow of feed-through signal to the summing node. The proposed multi-tap pre-emphasis circuit has been simulated using an IBM 130nm CMOS technology.

Keywords

CMOS integrated circuits; FIR filters; digital-analogue conversion; CMOS technology; FIR filter; backplane communications system; bit rate 10 Gbit/s; current mode DAC; digital-to-analog converter; finite impulse response; multitap pre-emphasis circuit; signal feed-through problem; size 130 nm; Backplanes; Integrated circuit modeling; Backplane; Current Mode Digital-to-Analog Converter; Finite impulse response (FIR); Pre-emphasis; iDAC; signal feed-through;

fLanguage

English

Publisher

ieee

Conference_Titel

SOC Conference (SOCC), 2011 IEEE International

Conference_Location

Taipei

ISSN

2164-1676

Print_ISBN

978-1-4577-1616-4

Electronic_ISBN

2164-1676

Type

conf

DOI

10.1109/SOCC.2011.6085130

Filename

6085130