“Design of high-speed wireline transceivers”

Summary form only given. This talk conveys the design principle and realization of modern wireline transceivers applicable to various optical and electrical channels. Starting with a general TRx architecture, we look at the developments and challenges of state-of-the-art building blocks, such as PLL, VCO, frequency divider, MUX, DMUX, CDR, limiting amplifier, and equalizer. Most recent research results, especially in CMOS technology, are presented, and a few broadband design techniques are introduced in detail. It provides a quick understanding to the high-speed TRx. Several design examples (most of them are from the lecturer´s group) serves as case study in the end.