DocumentCode :
2394454
Title :
Minimized constrains for lateral profiling of hot-carrier-induced oxide charges and interface traps in MOSFETs
Author :
Lu, Chun- Yuan ; Chang-Liao, Kuei- Shu
Author_Institution :
Dept. of Eng. & Syst. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear :
2003
fDate :
6-8 Oct. 2003
Firstpage :
49
Lastpage :
51
Abstract :
The lateral profile of oxide trap charge (Qot) and interface traps (Nit) is crucial for improving the reliability of MOSFET and flash memory device. A charge pumping technique has been shown to profile the Qot and Nit directly from the experimental results. However, the neutralization condition is acquired by trial and error, which takes much time and effort. Therefore, a technique of two-step neutralization is proposed to find out the appropriate neutralization condition in this work, which is effectively applied to this profiling technique to various dimension and structures of devices. This two-step neutralization combined with the error-reduction method is expected to profile Qot and Nit more quickly and precisely.
Keywords :
MOSFET; flash memories; hot carriers; interface states; MOSFETs; charge pumping; error-reduction method; flash memory device; hot-carrier-induced oxide charges; interface traps; reliability; two-step neutralization; Charge measurement; Charge pumps; Current measurement; Electron traps; Flash memory; Hot carriers; MOSFETs; Q measurement; Reliability engineering; Stress;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, Systems, and Applications, 2003 International Symposium on
ISSN :
1524-766X
Print_ISBN :
0-7803-7765-6
Type :
conf
DOI :
10.1109/VTSA.2003.1252549
Filename :
1252549
Link To Document :
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