DocumentCode :
2395594
Title :
Error floor analysis for an ensemble of easily implementable irregular (2048, 1024) LDPC codes
Author :
Cole, Chad A.
Author_Institution :
Syracuse Res. Corp, Chantilly, VA
fYear :
2008
fDate :
16-19 Nov. 2008
Firstpage :
1
Lastpage :
5
Abstract :
The following paper describes a design process for constructing semirandom LDPC codes with characteristics that are suitable for a relatively simple implementation for both the encoding and decoding operation. The paper will focus on two particular code ensembles - both rate-1/2 (2048, 1024) designs with a specified irregular degree distribution. These code parameters were chosen simply because they satisfied a project design constraint, but the process described can be extended to most other low-density designs. Some new insights into the codepsilas performance curve behavior in the low error region under message passing decoding are presented.
Keywords :
error analysis; message passing; parity check codes; random codes; error floor analysis; irregular (2048,1024) LDPC codes; message passing decoding; performance curve behavior; project design constraint; semirandom codes; Algorithm design and analysis; Bit error rate; Encoding; Error analysis; Floors; Iterative algorithms; Iterative decoding; Message passing; Parity check codes; Process design; LDPC; error floors; irregular designs;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Military Communications Conference, 2008. MILCOM 2008. IEEE
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4244-2676-8
Electronic_ISBN :
978-1-4244-2677-5
Type :
conf
DOI :
10.1109/MILCOM.2008.4753229
Filename :
4753229
Link To Document :
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