DocumentCode :
2396770
Title :
Optimal Unified Data Allocation and Task Scheduling for Real-Time Multi-Tasking Systems
Author :
Ghattas, Rony ; Parsons, Gregory ; Dean, Alexander G.
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC
fYear :
2007
fDate :
3-6 April 2007
Firstpage :
168
Lastpage :
182
Abstract :
Many real-time (RT) embedded systems can benefit from a memory hierarchy to bridge the processor/memory speed gap. These RT embedded systems usually utilize a cacheless architecture to avoid the time variability which complicates the timing analysis essential for RT systems. In the absence of a cache the burden of allocating the data objects to the memory hierarchy is on the programmer/compiler. There has been much research into allocating data objects into the memory hierarchy for efficient execution. However, existing methods have limited scope and ignore some aspects of RT multitasking embedded systems. In this paper we propose a synergistic, optimal approach to allocating data objects and scheduling real-time tasks for embedded systems. We allocate data using integer linear programming (ILP) to minimize each task´s worst-case execution time (WCET), then perform preemption threshold scheduling (PTS) on the tasks to reduce stack memory requirements while still meeting hard RT deadlines. The memory reduction of PTS allows these steps to be repeated. The data objects now require less memory, so more can fit into faster memory, further reducing WCET. The increased slack time can be used by PTS to reduce preemptions further, until a fixed point is reached. We evaluate the technique with several levels of data object granularity using both synthetic workloads and a real-time benchmark and find it to be highly effective
Keywords :
cache storage; integer programming; linear programming; multiprogramming; real-time systems; cacheless architecture; data object granularity; embedded systems; integer linear programming; memory hierarchy; optimal unified data allocation; processor/memory speed gap; programmer/compiler; real-time multi-tasking systems; task scheduling; Bridges; Embedded system; Hardware; Integer linear programming; Processor scheduling; Program processors; Programming profession; Random access memory; Real time systems; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Real Time and Embedded Technology and Applications Symposium, 2007. RTAS '07. 13th IEEE
Conference_Location :
Bellevue, WA
ISSN :
1080-1812
Print_ISBN :
0-7695-2800-7
Type :
conf
DOI :
10.1109/RTAS.2007.23
Filename :
4155320
Link To Document :
بازگشت