• DocumentCode
    2397190
  • Title

    A neural algorithm for reconstructing mesh-connected processor arrays using single-track switches

  • Author

    Takanami, Itsuo ; Kurata, Kazushi ; Watanabe, Takahiro

  • Author_Institution
    Dept. of Comput. Sci., Iwate Univ., Morioka, Japan
  • fYear
    1995
  • fDate
    18-20 Jan 1995
  • Firstpage
    101
  • Lastpage
    110
  • Abstract
    To overcome faults in mesh-connected processor arrays, a number of reconfiguration schemes have been studied in the literature. One of them, the mesh-connected processor arrays model based on single-track switches, has been proposed in. The model has the advantage of its inherent simplicity of the routing hardware. So far, some algorithms have been proposed to solve the problem of reconfiguration for this model. For example, a polynomial time algorithm has been presented. However, it needs global information on fault distribution and it seems to be a troublesome job to implement the algorithm even by software while it may be impossible to implement it by hardware. In this paper, using a Hopfield-type neural network model, we present an algorithm for reconstructing the mesh-connected processor arrays using single-track switches and show its effectiveness by computer simulation. Furthermore, we present a hardware implementation of the neural algorithm by which a self-repair system can be realized
  • Keywords
    Hopfield neural nets; fault tolerant computing; parallel architectures; reconfigurable architectures; wafer-scale integration; Hopfield-type neural network model; computer simulation; fault distribution; mesh-connected processor arrays; neural algorithm; reconfiguration; reconstruction; routing hardware; self-repair system; single-track switches; Circuit faults; Computer science; Hardware; Hopfield neural networks; Integrated circuit interconnections; Neural networks; Routing; Switches; Very large scale integration; Wafer scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Wafer Scale Integration, 1995. Proceedings., Seventh Annual IEEE International Conference on
  • Conference_Location
    San Francisco, CA
  • Print_ISBN
    0-7803-2467-6
  • Type

    conf

  • DOI
    10.1109/ICWSI.1995.515443
  • Filename
    515443